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Marvell Technology

ASIC Design Engineer

๐Ÿ“ŒMA, United States ๐Ÿ‡บ๐Ÿ‡ธ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ mid-level

About Marvell

Marvellโ€™s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Core Complex organization in the Processor Business Unit designs, builds, and integrates the processor, coherent cache, interconnect fabric, and the IO-bridge. The team works across Architecture, RTL, Verification, Physical Design disciplines to deliver high-performance, low-power SoCs for use in wireless infrastructure and networking equipment including servers, switches, routers, secure gateways, firewall, network monitoring, and smartNICs.

What You Can Expect

Design IP modules based on system architecture specification. Write hardware micro-architecture design specification for RTL implementation. Run simulation and debug tests failures. Run LINT/CDC/Power flow scripts to check design quality. Verify and debug the RTL to ensure coherence with the hardware specification. Run common front end design flow tools like lint, Verilog AUTOs, Synopsys Verdi to compile and simulate a design. Work with the verification team for test coverage closure. Work with the physical design team for timing closure. Collaborate with architects to arrive at solutions for complex hardware design problems.

What We're Looking For

Masterโ€™s or foreign equivalent degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

Must have work/internship experience or completed graduate coursework/research in each of the following:

  • Verilog, System Verilog, VHDL language for Hi-speed.
  • Low power digital ASIC design.
  • Synopsys, Cadence, Mentor tool sets.
  • Static timing analysis, FPGA prototyping, ASIC bring up and debugging.
  • RISC architecture and interface protocols.
  • Micro-architecture for ASIC design and implementation.
  • IP specification.
  • Power analysis and improvement for digital circuit.

Additional Compensation And Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. Weโ€™re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what itโ€™s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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  • Employment

    โฑ๏ธŽ full-time

  • Experience

    ๐Ÿง™โ€โ™‚๏ธ mid-level

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