Are you passionate about revolutionizing hardware design?

As an ASIC Design Engineer at Antmicro, you will join a team of innovators working on new designs and tooling for state-of-the-art silicon.

You will collaborate with experts in various domains to design, implement, and optimize ASICs for datacenter, security, IoT and other applications, using test-driven, software-oriented methodologies. This role requires a deep understanding of digital logic and architecture, as well as a willingness to tackle complex challenges in interoperability, performance tuning, and low-level design.

A good background in topics such as hardware emulation, computer architectures, and systems integration is welcome, and openness to new approaches and incorporating productivity enhancements using open source tools into your workflow is necessary.

We are a leading developer of open source ASIC design tooling and IP, working within organizations like CHIPS Alliance and RISC-V to push forward a more transparent, open and software-driven ASIC ecosystem.

Requirements

• BSc or MSc in computer science, electrical engineering or related fields
• expertise in HDLs (e.g. SystemVerilog, Verilog, VHDL, Chisel)
• good understanding of computer architecture (RISC-V experience is a plus)
• strong expertise in digital logic design, RTL, and ASIC development
• knowledge of common bus architectures like TileLink, AXI, AHB, APB, Wishbone
• knowledge of typical communication interfaces such as UART, I2C, I3C, SPI, PCIe and USB
• expertise in verification (e.g. UVM and/or Cocotb) and Continuous Integration
• understanding of the implications of working with different process design kits (PDKs)
• understanding of operating systems and low level software
• good knowledge of programming languages like C/C++/Rust
• good knowledge of scripting languages like Python/Bash/TCL
• working knowledge of Linux
• eligibility to work in the EU
• readiness to work on-site